Setting; Configuration - ABB REC 561 User Manual

ABB Network Partner AB
Version 1.0-00

3 Setting

4 Configuration

Configurable logic
The appendix, attached to this document of the configurable logic, con-
tains:
• Simplified terminal diagrams
• Description of the connection and production signals
• Description of the setting parameters
Time delays and pulse lenghts for the different timers in REL 531 can be
set from the built-in MMI under the submenu:
Configuration
FunctionInputs
Timer (Pulse)
For REL 531, you can also set the timers from the SMS.
For REC 561, the time delays and pulse lenghts are set from the CAP 531
configuration tool.
Both timers in the same logic block (the one delayed on pick-up and the
one delayed on drop-out) always have a common setting value. Setting
values of the pulse length are independent on one another for all pulse cir-
cuits.
The configuration of the logics is performed from the CAP 531 configura-
tion tool for REL 531 and REC 561, but can for REL 531 also be done
from the SMS and the built-in MMI.
Execution of functions as defined by the configurable logic blocks runs in
a fixed sequence in two different cycle times, typical 8 ms and 200 ms.
For each cycle time, the function block is given an execution serial
number. This is shown when using the CAP 531 configuration tool with
the designation of the function block and the cycle time, for example,
TMnn-(1044, 8). TMnn is the designation of the function block, 1044 is
the execution serial number and 8 is the cycle time.
Execution of different function blocks within the same cycle time should
follow the same order as their execution serial numbers to get an optimal
solution. Always remember this when connecting in series two or more
logical function blocks. When you connect function blocks with different
cycle times, see the use of MOVE function blocks in the section "MOVE"
on page 29.
So design the logic circuits carefully and check always the execution
sequence for different functions. In the opposite cases, additional time
delays must be introduced into the logic schemes to prevent errors, for
example, race between functions.
1MRK 580 161-XEN
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