Table of Contents
Advertisement
S5-95F
Setting a Counter "S" and Counting Down "CD"
Example: When input I 0.1 is switched on (set), counter 1 is set to count 7. Output Q 1.0 is now
"1". Every time input I 0.0 is switched on (count down), the count is decremented by 1.
The output is set to "0" when the count is "0".
1
0
1
0
7
0
1
0
S C 1
STL
A
I
0.0
CD
C
1
NOP
0
A
I
0.1
L
KC
7
S
C
1
NOP
0
NOP
0
NOP
0
A
C
1
=
Q
1.0
EWA 4NEB 812 6210-02
Timing Diagram
I 0.0
I 0.1
C 1
Q 1.0
Time
S C 1
CSF
C 1
I 0.0
CD
CU
I 0.1
S
KC 7
CV
BI
DE
R
Q
I 0.0
I 0.0
I 0.1
KC 7
Q 1.0
STEP 5 Operations
Circuit Diagram
I 0.1
KC 7
R
S
CI
I I I I
Binary
CQ
16 bits
0
Q 1.0
Count
LAD
C 1
CD
CU
S
CV
BI
DE
R
Q
Q 1.0
8-27
Advertisement
Table of Contents
