Intel 80960MC Manual page 4

80960MC
FIGURES
Figure 1. 80960MC Programming Environment ........................................................................................ 1
Figure 2. Instruction Formats .................................................................................................................... 4
Figure 3. Multiple Register Sets Are Stored On-Chip ............................................................................... 6
Figure 4. Connection Recommendations for Low Current Drive Network .............................................. 13
Figure 5. Connection Recommendations for High Current Drive Network .............................................. 13
Figure 6. Typical Supply Current vs. Case Temperature ........................................................................ 14
Figure 7. Typical Current vs. Frequency (Room Temp) .......................................................................... 14
Figure 8. Typical Current vs. Frequency (Hot Temp) .............................................................................. 15
Figure 9. Worst-Case Voltage vs. Output Current on Open-Drain Pins .................................................. 15
Figure 10. Capacitive Derating Curve ....................................................................................................... 15
Figure 11. Test Load Circuit for Three-State Output Pins ......................................................................... 16
Figure 12. Test Load Circuit for Open-Drain Output Pins ......................................................................... 16
Figure 13. Drive Levels and Timing Relationships for 80960MC Signals ................................................. 18
Figure 14. Timing Relationship of L-Bus Signals ................................................................................ ...... 19
Figure 15. System and Processor Clock Relationship ............................................................................. . 19
Figure 16. Processor Clock Pulse (CLK2) ................................................................................................ 21
Figure 17. RESET Signal Timing .............................................................................................................. 21
Figure 18. HOLD Timing ........................................................................................................................... 22
Figure 19. 132-Lead Pin-Grid Array (PGA) Package ................................................................................ 23
Figure 20. 80960MC PGA Pinout-View from Bottom (Pins Facing Up) .................................................. 24
Figure 21. 80960MC PGA Pinout-View from Top (Pins Facing Down) .................................................. 25
Figure 22. 25 MHz Maximum Allowable Ambient Temperature ................................................................ 29
Figure 23. Non-Burst Read and Write Transactions Without Wait States ................................................. 30
Figure 24. Burst Read and Write Transaction Without Wait States .......................................................... 31
Figure 25. Burst Write Transaction with 2, 1, 1, 1 Wait States .................................................................. 32
Figure 26. Accesses Generated by Quad Word Read Bus Request, Misaligned Two Bytes from
Quad Word Boundary (1, 0, 0, 0 Wait States) ......................................................................... 33
Figure 27. Interrupt Acknowledge Transaction ......................................................................................... 34
Figure 28. Bus Exchange Transaction (PBM = Primary Bus Master, SBM = Secondary Bus Master) ..... 35
TABLES
Table 1. 80960MC Instruction Set ........................................................................................................... 3
Table 2. Memory Addressing Modes ....................................................................................................... 4
Table 3. Sample Floating-Point Execution Times (µs) at 25 MHz ........................................................... 7
Table 4. 80960MC Pin Description: L-Bus Signals .................................................................................. 9
Table 5. 80960MC Pin Description: Support Signals ............................................................................. 11
Table 6. DC Characteristics ................................................................................................................... 17
Table 7. 80960MC AC Characteristics (25 MHz) ...................................................................................20
Table 8. 80960MC PGA Pinout - In Pin Order .....................................................................................26
Table 9. 80960MC PGA Pinout - In Signal Order ................................................................................ 27
Table 10. 80960MC PGA Package Thermal Characteristics ................................................................... 28
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