Intel 80960MC Manual page 35

Embedded 32-bit microprocessor with integrated floating-point unit and memory management unit
Table of Contents

Advertisement

80960MC
T
T
T
T
T
T
T
T
T
T
a
d
d
r
a
d
d
d
r
d
CLK2
CLK
LAD31:0
ALE
ADS
BE3:0
W/R
DT/R
DEN
READY
Figure 24. Burst Read and Write Transaction Without Wait States
31

Advertisement

Table of Contents
loading

Table of Contents