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80960MC
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Intel 80960MC Manual page 37
Embedded 32-bit microprocessor with integrated floating-point unit and memory management unit
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80960MC
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a
w
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CLK2
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LAD31:0
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BE1:0
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READY
Figure 26. Accesses Generated by Quad Word Read Bus Request, Misaligned Two Bytes from Quad
Word Boundary (1, 0, 0, 0 Wait States)
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