Intel 80960MC Manual page 36

Embedded 32-bit microprocessor with integrated floating-point unit and memory management unit
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80960MC
T
T
a
w
CLK2
CLK
LAD31:0
ALE
ADS
BE3:0
W/R
DT/R
DEN
READY
Figure 25. Burst Write Transaction with 2, 1, 1, 1 Wait States
32
T
T
T
T
w
d
w
T
T
d
w
d
T
T
T
w
d
r

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