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9.3
PLE operations
9.3.1
Preload Engine FIFO flush operation
9.3.2
Preload Engine pause channel operation
9.3.3
Preload Engine resume channel operation
ARM DDI 0388I
ID073015
The following sections describe the PLE operations:
•
Preload Engine FIFO flush operation
•
Preload Engine pause channel operation
•
Preload Engine resume channel operation
•
Preload Engine kill channel operation on page 9-5
•
PLE Program New Channel operation on page
For all Preload Engine operations:
•
NSACR.PLE controls Non-secure execution.
•
PLEUAR.EN controls User execution.
•
the operations are only available in configurations where the Preload Engine is present,
otherwise an Undefined Instruction exception is taken.
The PLEFF operation characteristics are:
Purpose
Flushes all PLE channels programmed previously including the PLE
channel being executed.
To perform the PLE FIFO Flush operation, use:
MCR p15, 0, <Rt>, c11, c2, 1
<Rt> is not taken into account in this operation.
The PLEPC operation characteristics are:
Purpose
Pauses PLE activity.
You can perform a PLEPC operation even if no PLE channel is active. In this case, even if a
new PLE channel is programmed afterwards, its execution does not start until after a PLE
Resume Channel operation.
To perform the PLE PC operation, use:
MCR p15, 0, <Rt>, c11, c3, 0
<Rt> is not taken into account in this operation.
The PLERC operation characteristics are:
Purpose
Causes Preload Engine activity to resume.
If you perform a PLERC operation when the PLE is not paused, the Resume Channel operation
is ignored.
To perform a PLERC operation, use:
MCR p15, 0, <Rt>, c11, c3, 1
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9-5.
Preload Engine
9-4
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