Figure 55. Jtag And Trace Debug Connectors - Schematic Diagram - STMicroelectronics STM32L476G-EVAL User Manual

Figure 55. JTAG and trace debug connectors - schematic diagram

RS1
TMS/SWDIO
TCK/SWCLK
TDO/SWO
TDI
TRST
RESET#
22
CN12
FTSH-110-01-L-DV
VDD
1
2
3
4
5
6
7
8
9
10
Trace connector
11
12
13
14
15
16
17
18
19
20
U19
1 5
IO1 IO4
2
GND GND
3 4
IO2 IO3
ESDALC6V1W5
TRACE_D3
TRACE_D2
TRACE_D1
TRACE_D0
TRACE_CK
VDD
R153 R160 R152 R126
[N/A] [N/A] [N/A] [N/A]
GND
PA13
PA14
PB3
PA15
PB4
R155
[N/A]
CN15
GND
JTAG VDD
1
2
3
4
5
6 VDD
7
KEY
8
9 R157
10 [N/A]
11
12
R154 0 13 R159
R162 [N/A] 14 10K
R156 0 15
R131 [N/A] 16
17 R163 10K
18
19 R164 10K
JTAG connector
20
PE6
PE5
PE4
PE3
PE2
U17
1 5
IO1 IO4
2
GND
3 4
IO2 IO3
ESDALC6V1W5
U18
1 5
IO1 IO4
2
GND
3 4
IO2 IO3
ESDALC6V1W5
Title: JTAG&Trace
Project: STM32L476G-EVAL
Size: A3 Reference: MB1144 Revision:
Date: 6/24/2015 Sheet: 24
B-02
of 25