Quad-Spi Flash Memory Device; Table 26. Configuration Elements Related With Quad-Spi Device - STMicroelectronics STM32L476G-EVAL User Manual

UM1855
wired through I²C bus or wireless using 13.56 MHz RF band reserved for RFID and NFC
equipment. For wireless access, CR95HF reader daughterboard plugged in the CN13
connector can be used, for example.
I²C address of RF-EEPROM device is 0xA6.
2.25

Quad-SPI Flash memory device

N25Q256A13EF840E, a 256-Mbit Quad-SPI Flash memory device, is fitted on the
STM32L476G-EVAL main board, in U9 position. It allows evaluating STM32L476ZGT6
Quad-SPI Flash memory device interface.
N25Q256A13EF840E can operate in single transfer rate (STR) and double transfer rate
(DTR) modes.
By default, the Quad-SPI Flash memory device is not accessible.
configuration elements and their settings allowing to access the Quad-SPI Flash memory
device. The LCD glass module daughterboard MB979 takes active part in the configuration.
It must be removed from the main board (denoted as "MB979 out"), to operate the Quad-
SPI Flash memory device.
Element
SB12
SB13
MB979
SB14
SB15
MB979
SB18
SB19
MB979
Section 2.12: Motor control

Table 26. Configuration elements related with Quad-SPI device

Setting
Default setting.
SB12 open QSPI_D0 data line is not available at Quad-SPI Flash memory device:
SB13 open PB1 port of STM32L476ZGT6 is only routed to CN11 connector for the
MB979 daughterboard.
SB12 closed QSPI_D0 data line is available at Quad-SPI Flash memory device:
SB13 open PB1 port of STM32L476ZGT6 is routed to DQ0 port of Quad-SPI Flash
MB979 out memory device.
Default setting.
SB14 open QSPI_D1 data line is not available at Quad-SPI Flash memory device:
SB15 open PB0 port of STM32L476ZGT6 is only routed to CN11 connector for the
MB979 daughterboard.
SB14 closed QSPI_D1 data line is available at Quad-SPI Flash memory device:
SB15 open PB0 port of STM32L476ZGT6 is routed to DQ1 port of Quad-SPI Flash
MB979 out memory device.
Default setting.
SB18 open QSPI_D2 data line is not available at Quad-SPI Flash memory device:
SB19 open PA7 port of STM32L476ZGT6 is only routed to CN11 connector for the
MB979 daughterboard.
SB18 closed QSPI_D2 data line is available at Quad-SPI Flash memory device:
SB19 open PA7 port of STM32L476ZGT6 is routed to DQ2 port of Quad-SPI Flash
MB979 out memory device.
DocID027351 Rev 3
Hardware layout and configuration
Table 26
provides additional information.
Configuration
shows the
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