Figure 49. USB_OTG_FS port schematic diagram
U1
2
5
JP19
+5V
PC6
4
USBOTG_PPWR
Header 2X1
STMPS2151STR
R21
10K
PB13
USBOTG_PRDY
PA9
USBOTG_VBUS
PA11
R3
USBOTG_DM
PA12
R4
USBOTG_DP
PA10
R5
0
USBOTG_ID
D1
B3
Vbus
C3
D+out
D3
D-out
A2
Dz
B2
Pup
EMIF02-USB03F2
USB Full Speed operating range voltage: 3.0V<VDDUSB<3.6V
PB12
USBOTG_OVRCR
+3V3
U5V
R9
620
R8
LD6
47K
Red
3
GND
FAULT
1
IN
OUT
EN
C15
4.7uF
0
0
A3
ID
C1
D+in
D1
D-in
B1
Pd1
C2
Pd2
D2
GND
R2
0
CN1
1
VBUS
2
DM
3
DP
4
ID
5
GND
6
Shield
7
Shield
8
Shield
9
Shield
10
EXP
475900001
+3V3
R6
330
LD5
VBUS OK
Green
R1
T1
1
9013-SOT23
47K
R261
transistor pins numbers follow
22K
SOT23 JEDEC standard,
Title:
USB_OTG_FS
Project:
STM32L476G-EVAL
Size:
A4
Reference:
MB1144
Revision:
B-02
Date:
6/24/2015
Sheet:
18
of
25
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