Intel iAPX 86/88 User Manual page 55

8086/8088 CPU
Table 1·16 Instruction Set Reference Data (continued)
SEGMENTt
I
SEGMENT override prefix
Flags
ODITSZAPC
Override to specified segment
Operands Clocks Transfers' Bytes Coding Example
(no operands) 2(2)
-
1 MOV SS:PARAMETER AX
SHR
I
SHR destination, count
Shift logical right
FIODITSZAPC
ags X
X
Operands Clocks Transfers' Bytes Coding Example
register, 1 2(2)
-
2 SHR SI, 1
register, CL 8+41
-
2 SHRSI, CL
bit(5 + 1/bit)
memory, 1
15(15)+ EA 2 2·4 SHR ID_BYTE [SII [BX], 1
memoryCL
20+41 2 2-4
SHR INPUT_WORD, CL
bit(17 +
1/bit)+EA
register, n
(5+ 1/bit)
-
3 SHR SI, 5
memory, n
(17 + 1/bit) 2 3-5 SHRALPHA,5
SINGLE STEPt
I
SINGLE STEP (Trap flag interrupt)
Flags
ODITSZAPC
Interrupt if TF
=
1 00
Operands Clocks Transfers' Bytes Coding Example
(no operands) 50 5 N/A N/A
STC
I
STC (no operands)
Flags
ODITSZAPC
Set carry flag C
Operands Clocks
Transfers' Bytes Coding Example
(no operands)
2(2)
-
1 STC
STO
I
STD (no operands)
Flags
ODITSZAPC
Set direction flag 1
Operands Clocks Transfers' Bytes Coding Example
(no operands)
2(2) -
1
STD
STI
I
STI (no operands)
Flags
ODITSZAPC
Set interrupt enable flag 1
Operands Clocks Transfers'
Bytes
Coding Example
(no operands) 2(2) - 1 STI
"For the 8086 (80186) add four clocks for each 16-bit word transfer with an odd address. For the 8088 (80188) add four clocks for each 16-bit word
transfer.
tASM-86 incorporates the segment override prefix into the operand specification and not as a separate instruction. SEGMENT is included in table
1-16 only for timing information.
tSINGLE STEP is not an instruction, it is included in table 1-16 only for timing information.
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