Stack Operation - Intel iAPX 86/88 User Manual

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EXISTING
STACK
~
I
1062
00
11
1060
22
33
'"
105E 44
55
:1;0
105B
66
77
~~
~(I)
105A 88
99
0'"
0>0
TOS
:...::..::-. 1058 AA BB
1056
01
23
r
~O
1054 45
67
~~
ffl(l)
1052 89
AB
a:w
a..:I:
r
1050; CD; EF
~~
10
50 , SS
00
I
08
I
SP
8086/8088 CPU
PUSH AX
AX'12134
1-1
1062
00
11
I
1060
22
33
I
105E
44
55
I
105B
66
77
105A
88
99
I
1058
AA BB
f.J
~1056
34
12
1054 45
67
1052
89
AB
r
1050; CD; EF
10
50 'SS
00
061 SP
STACK OPERATION FOR CODE SEQUENCE
PUSH AX
POPAX
POPBX
Figure 1·14 Stack Operation
POPAX
POPBX
AX '12
I
34
1-,
BX' BB
I
AA
' - 1
I
I
I
I
1062
00
11
1060
22
33
I
I
I
lOSE
44
55
I
I
105C 66
77
I
~105A
I
88
99
J
I
105B AA BB
1056
34
12
_--1
1054
45
67
1052
89
AB
r
1050; CD; EF
10
50 ,
SS
00
I
OA
I
SP
affect the performance of 8088, locating 16-bit data on
even addresses will insure maximum throughput if the
system is ever transferred to an 8086.
1.2.2 Software Overview
The 8086 and 8088 execute exactly the same instructions.
This instruction set includes equivalents to the instruc-
tions typically found in previous microprocessors, such as
the
8080/8085.
Significant new operations include:
FFFFFH
RESERVED
FFFFCH
FFFFBH
DEDICATED
FFFFOH
FFFEFH
OPEN
.,
I
,
BOH
7FH
RESERVED
14H
13H
DEDICATED
OH
MEMORY
[FFH
OPEN
100H
RESERVED
FFH
FBH
F7H
OPEN
OH
liD
• multiplication and division of signed and unsigned bi-
nary numbers as well as unpacked decimal numbers,
• move, scan and compare operations for strings up to
64k bytes in length,
• non-destructive bit testing,
• byte translation from one code to another,
• software generated interrupts,
• a group of instructions that can help coordinate the
activities of multiprocessing systems.
The following paragraphs provide a description of the in-
structions by category and a detailed discussion of the
various operand addressing modes. In addition, a com-
plete instruction set summary is provided in tabular form
which recaps each device instruction by category, and
provides timing cycles for each instruction. Information
is also described on how to encode and decode machine
Figure 1·15 Reserved Memory and 110 Locations
instructions for any given assembly code instructioh.
1-12
210912·001

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