Intel iAPX 86/88 User Manual page 54

8086/8088 CPU
Table 1·16 Instruction Set Reference Data (continued)
SALISHL
I
SAL/SHL destination
Shift arithmetic left/Shift logical left
FIOOITSZAPC
ags X · X
Operands Clocks
Transfers·
Bytes
Coding Example
register, 1 2(2)
-
2 SALAL,1
register, CL 8+4/
-
2 SAL 01, CL
bit(5 + 1/bit)
memory, 1 15(15)+EA 2 2-4 SAL [BX], OVERDRAW, 1
memory, CL
20+41
2 2-4 SAL STORLCOUNT, CL
bit(17 +
1/bit)+EA
register, n
(5+ 1/bit)
-
3
SALAH,5
memory, n
(17+ 1/bit)
2 3-5 SAL ALPHA, 5
SAR
I
SAR destination, source
Flags
~
0 I
TSZAPC
Shift arithmetic right XXUXX
Operands Clocks
Transfers·
Bytes Coding Example
register, 1 2(2)
-
2 SAR OX, 1
register, CL 8+41
-
2 SAR 01, CL
bit(5 + 1/bit)
memory, 1 15(15)+EA 2 2-4 SAR N_BLOCKS, 1
memoryCL
20+41
2 2-4 SAR N_BLOCKS, CL
bit(17+
1/bit)+EA
register, n (5+ 1/bit)
-
3 SAR OX, 5
memory, n (17 + 1/bit) 2 3-5 SAR OGLTH, 5
SBB
I
SBB destination, source
Subtract with borrow .
FI 0 0 ITS ZAP C
ags X XXXXX
Operands Clocks Transfers· Bytes Coding Example
register, register 3(3)
-
2 SBBBX, CX
register, memory 9(10)+EA 1 2-4 SBB 01, [BX), PAYMENT
memory, register
16(10)+EA 2 2-4 SBB BALANCE, AX
accumulator, immediate 4(3-4)
-
2-3 SBBAX, 2
register, immediate 4(4)
-
3-4 SBBCL,1
memory, immediate 17(16)+EA 2 3-6 SBB COUNT, [SI), 10
SeAS
I
SCAS dest-string
Scan string
FIOOITSZAPC
ags X XXXXX
Operands Clocks li'ansfers·
Bytes
Coding Example
dest-string 15(15)
1
1 .
SCAS INPUT_LINE
(repeat) dest-string
9+ 15/rep
1/rep
1
REPNE SCAS BUFFER
(5+ 15/rep)
'For the 8086 (80186) add four clocks for each 16-bit word transfer with an odd address. For the 8088 (80188) add four clocks for each 16-bit word
t r a n s f e r . · .
1-38
210912-001