Intel iAPX 86/88 User Manual page 17

CHAPTER 1
8086/8088 CPU
1.1 INTRODUCTION
This chapter contains specific hardware design informa-
tion on the operation and functions of INTEL's 8086/8088
Central Processing Units (CPUs). This information con-
sists of a component overview of the 8086/88 micropro-
cessors presenting architectural and software
considerations, individual device pin functional and elec-
trical signal definitions, a detailed description of the mini-
mum and maximum operating modes, detailed
descriptions of the operation of the address and data
buses, an explanation of the protocols supported for local
bus transfers to other devices, and a detailed description
of interrupt operation. In addition, descriptions of the var-
ious 8086/88 family support circuits and their circuit
functions appear at the end of the chapter. For more spe-
cific information of any of the 8086 family support cir-
cuits, refer to the Microsystem Components Handbook
(Order Number: 230843-002).
1.2 COMPONENT OVERVIEW
The 8086 and 8088 are closely related third-generation
microprocessors. Both CPU's contain a 20-bit address
bus (1 mega-byte of address space) and utilize an identical
instruction/function format. Differences between the two
devices consist essentially of their respective data bus
widths. The 8088 is designed with an 8-bit external data
path to memory and lIO, while the 8086 can transfer 16
bits at a time. In almost every other respect the processors
are identical; software written for one CPU will execute
on the other without alteration. Both chips are contained
in standard 40-pin dual in-line packages and operate from
a single
+
5V power source. Except where expressly
noted, the descriptions contained in this chapter are appli-
cable to both microprocessors.
The 8086 and 8088 Microprocessors can be used for a
wide spectrum of microcomputer applications. This flexi-
bility is one of their most outstanding characteristics. Sys-
tems can range from small uniprocessor minimal-memory
designs implemented with a few chips (see Figure 1-1),
to
multiprocessor systems with up to a megabyte of memory
(see Figure 1-2).
Both the 8086 and 8088 microprocessors use a combined,
or "time-multiplexed", address and data bus that permits
several of the device pins to serve dual functions. Some
microprocessor control pins also serve dual functions.
These pins are defined according to the strapping of a
single input pin (the MN/MX* pin). This feature provides
configuration of the CPU's in either "minimum mode" or
"maximum mode" circuits.
1-1
In the "minimum mode," the CPU is configured for
small, single-processor systems. In this configuration all
control signals are provided by the CPU and the dual
function pins transfer signals directly to memory and
input/output devices.
In the "maximum mode" these same pins take on differ-
ent functions that are helpful in medium
to
large systems,
especially systems with multiple processors. An Intel
8288 Bus Controller is used to provide the control signal
outputs. This allows several of the device pins previously
delegated to these control functions to be redefined in or-
der to support multiprocessing applications. A detailed
description of this feature is presented later in the chapter.
The 8086 and 8088 Microprocessors are designed to op-
erate with the 8089 Input/Output Processor (lOP) and
other processors in multiprocessing and distributed proc-
essing systems. When used in conjunction with one or
more 8089s, the 8086 and 8088 expand the applicability
of microprocessors into lIO-intensive data processing sys-
tems. Built-in coordinating signals and instructions, and
electrical compatibility with Intel's MULTIBUS® shared
bus architecture, simplify and reduce the cost of develop-
ing multiple-processor designs.
Both the 8086 and 8088 are substantually more powerful
than any microprocessor previously offered by Intel. Ac-
tual performance, of course, varies from application to
application, but comparisons to the industry standard
2-MHz 8080A are instructive. The 8088 is from four to
six times more powerful than the 8080A; the 8086 pro-
vides seven to ten times the 8080Xs performance.
The 8086's advantage over the 8088 is the result of the
8086's 16-bit external data bus. In applications that ma-
nipulate 8-bit quantities extensively, or that are
execution-bound, the 8088 can approach to within 10%
of the 8086's processing throughput.
The improved performance of the 8086 and 8088 is ac-
complished by combining a l6-bit internal data path with
a pipelined architecture that allows instructions to be pre-
fetched during spare bus cycles. In addition, a compact
instruction format that enables more instructions to be
fetched in a given amount of time contributes to this high
performance.
Software for 8086 and 8088 systems does not need to be
written in assembly language. The CPUs are designed to
provide direct hardware support for programs written in
high-level languages such as Intel's PLlM-86. Most
high-level languages store variables in memory; the
8086/8088 symmetrical instruction set supports direct op-
eration on memory operands, including operands on the
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