Intel iAPX 86/88 User Manual page 37

1
1
1
1
1
1
1
1
+
L
8086/8088 CPU
HIGH ADDRESS
DISPLACEMENT
I
6
J
. PARM 2
~
PARM 1
IP
OLD BP
I
BASE REGISTERJIBPI
OLD BX
IBPI
INDEX !GISTER
OLD AX
r-
ARRAY (61
ARRAY 151
I
12
I
ARRAY (4)
i
ARRAY 131
EA
t-
ARRAY 121
---I
ARRAY 111 .-
ARRAY 101
COUNT ------1
TEMP
______ 1_
STATUS
..... 1 WORD .....
LOWER ADDRESS
1
1
I
1
4
1
i
1
EA
1
Figure 1-25 Accessing a Stacked Array with Based Index Addressing
Two different addressing modes can be used to access
ports located in the
110
space (see Figure 1-27). The port
number is an 8-bit immediate operand for direct address-
ing. This allow fixed access to ports numbered 0-255.
Indirect
110
port addressing is similar to register indirect
addressing of memory operands. The port number is
taken from register DX and can range from 0 to 65,535.
By previously adjusting the content of register DX, one
instruction can access any port in the
110
space. A group
of adjacent ports can be accessed using a simple software
loop that adjusts the value of DX.
Instruction timings are presented as the number of clock
periods required to execute a particular form of the in-
struction (register-to-register, immediate-to-memory,
etc.). If the system is running with a 5 MHz maximum
clock, the maximum clock period is 2oons; at 8MHz, the
clock period is 125ns. When memory operands are used,
" +
EA" indicates a variable number of additional clock
periods needed to calculate the operand's effective ad-
dress. Table 1-15 lists all effective address calculation
times.
INSTRUCTION SET SUMMARY
The following paragraphs, and tables, provide detailed in-
formation for the 8086/8088 instruction set. Tables 1-12,
1-13 and 1-14 explain the symbols that are used in Table
1-16, the instruction set reference data table. Machine
language instruction encoding and decoding information
is provided in the paragraphs immediately following the
instruction set summary.
IOPCODE
I
~
___
S~I
____
~~I
SOURCEEA
____ D_I ____ ... J - - - I DESTINATION EA
I
Figure 1-26 String Operand Addressing
1-21
DIRECT PORT ADDRESSING
~
~1~P~O~R~T~A~D~D~R'=ES~s~1
INDIRECT PORT ADDRESSING
Figure 1-27
1/0
Port Addressing
210912-001