Logical Addresses Sources; Physical Address Generation - Intel iAPX 86/88 User Manual

8086/8088 CPU
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PHYSICAL ADDRESS
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TO MEMORY
Figure 1·12 Physical Address Generation
exception is the destination operand of a string instruction
which must be an extra segment.) This is done by preced-
ing an instruction with a segment override prefix. This
one-byte machine instruction tells the BID which segment
register to use to access a variable referenced in the fol-
lowing instruction.
DYNAMICALLY RELOCATABLE CODE
The segmented memory structure of the 8086 and 8088
makes it possible to write programs that are
position-independent, or dynamically relocatable. Dy-
namic relocation allows a multiprogramming or multi-
tasking system to make particularly effective use of
available memory. Inactive programs can be written to
disk and the space they occupied allocated programs. If a
disk-resident program is needed later, it can be read back
into any available memory location and restarted. Simi-
larly, if a program needs a large contiguous block of stor-
age, and the total amount is only available in non-adjacent
fragments, other program segments can be compacted to
free up a continuous space. This process is illustrated
graphically in Figure 1-13.
To be dynamically relocatable, a program must not load
or alter its segment registers and must not transfer di-
rectly to a location outside the current code segment. In
other words, all offsets in the program must be relative to
fixed values contained in the segment registers. This al-
lows the program to be moved anywhere in memory as
long as the segment registers are updated to point to the
new base addresses.
STACK IMPLEMENTATION
Stacks in the 8086 and 8088 are implemented in memory
and are located by the stack segment register
(SS)
and the
stack pointer (SP). A system may have an unlimited num-
ber of stacks, and a stack may be up to 64k bytes long, the
maximum length of a segment. (An attempt to expand a
stack beyond 64k bytes overwrites the beginning of the
segment.) One stack is directly addressable at a time; this
is the current stack, often referred to simply as "the"
stack. SS contains the base address of the current stack
and SP points to the top of stack (IDS). In other words,
SP contains the offset of the top of the stack from the
stack segment's base address. However, the stack's base
address (contained in SS) is not the "bottom" of the stack.
Stacks in the 8086 and 8088 are 16 bits wide; instructions
that operate on a stack add and remove stack items one
word at a time. An item is pushed onto the stack (see
Figure 1-14) by decrementing SP by 2 and writing the
item at a new IDS. An item is popped off the stack by
Table 1·2 Logical Addresses Sources
DEFAULT
ALTERNATE
TYPE OF MEMORY REFERENCE
SEGMENT
SEGMENT OFFSET
BASE BASE
Instruction Fetch CS
NONE
IP
Stack Operation SS
NONE SP
Variable (except following) DS
CS,ES,SS
Effective Address
String Source DS
CS,ES,SS
SI
String Destination ES
NONE
DI
BP Used As Base Register SS
CS,DS,ES Effective Address
1-10
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