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Pin
1/0
SYMBOL
Signal name and Description
26
0
A01
A011: Address bit 1
27
0
IOD6
IOD61: Bidirectional
1/0
data bus
28
Vcc
+ 5Vdc
29
GND
Ground
30
0
IOD7
IOD71: Bidirectional
1/0
data bus
31
GND
Ground
31
I
IOD51-IOD01 :
-
Bidirectional 110 data bus
36
37
I
HlDA
HlDA1:
During the CPU cycle, this signal is "1".
During the DMA cycle, this signal is "2".
38
0
CAlE
CAlE1 :
Address AD191-AD001 is latched at the rising edge
of the "H" pulse.
39
0
PDICS
PDICSO: Programmable
1/0
port chip select signal
40
GND
Ground
41
I
TEST2
P02AO: Test pin
42
I
WDlEN
WDlENO:
When the word
"1/0"
is accessed, EVEN data is
enabled to be latched.
43
I
WDlAT
WDLAT1:
When the word "110" is accessed, EVEN data is
latched.
44
0
PAGWR
PAGWRO: DMA page register chip select signal
45
0
NMICS
NMICSO: NMI chip selct signal
46
0
AOO
A001: Address bit 0
C - 5
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