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Toshiba T1200 User Manual page 163

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APPBRDIX B
I/O DRrvBR G.A.
B.l
GBRBRAL
I/O driver gate array is composed of two main controllers;
FDD controller, and PRT controller, each of which is
explained individually in this section.
This G.A. (Gate Array) contains 100 pins altogether and the
functions or devices of each controller are as follows;
a) FDD Controller
- Digital Input Register (3F7H Read)
- Digital Output Register (3F2H Write)
- X-Rate Register (3F7H Write)
- DMA Request Delay
- Write Precompensation
- FDC Chip Select
b) Printer Controller
- Data Register (378H Read/Write)
- Status Register (379B)
- Control Register (37AB)
The detailed explanation about each pin is also given
together with its block diagram.
B - 1

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