Timer Clock Select Register 6 Format - NEC PD78081(A) User Manual

(2) Timer clock select register 6 (TCL6)
This register sets count clocks of 8-bit timer register 6.
TCL6 is set with an 8-bit memory manipulation instruction.
RESET input sets TCL6 to 00H.
Symbol 7 6
TCL6 0 0
TCL63 TCL62 TCL61 TCL60
0 0
0 0
0 1
0 1
0 1
0 1
1 0
1 0
1 0
1 0
1 1
1 1
1 1
1 1
Other than above
Note When clock is input from the external, timer output (PWM output) cannot be used.
Caution When rewriting TCL6 to other data, stop the timer operation beforehand.
Remarks 1. f
XX
2. f
X
3. TI6 : 8-bit timer register 6 input pin
4. MCS : Oscillation mode selection register (OSMS) bit 0
5. Values in parentheses when operated at f
86
CHAPTER 6 8-BIT TIMER/EVENT COUNTERS 5 AND 6
Figure 6-4. Timer Clock Select Register 6 Format
5 4 3 2
0 0 TCL63 TCL62 TCL61 TCL60
0 0 TI6 falling edge
0 1 TI6 rising edge
0 0 2f
XX
0 1 f
XX
1 0 f /2
XX
2
1 1
f /2
XX
3
0 0 f /2
XX
4
0 1
f /2
XX
5
1 0
f /2
XX
6
1 1 f /2
XX
7
0 0 f /2
XX
8
0 1 f /2
XX
9
1 0 f /2
XX
11
1 1 f /2
XX
Setting prohibited
: Main system clock frequency (f
: Main system clock oscillation frequency
Address
1 0
FF56H
8-bit Timer Register 6 Count Clock Selection
MCS=1
Note
Note
Setting prohibited
f (5.0 MHz)
X
f /2 (2.5 MHz)
X
2
f /2 (1.25 MHz)
X
3
f /2 (625 kHz)
X
4
f /2 (313 kHz)
X
5
f /2 (156 kHz)
X
6
f /2 (78.1 kHz)
X
7
f /2 (39.1 kHz)
X
8
f /2 (19.5 kHz)
X
9
f /2 (9.8 kHz)
X
11
f /2 (2.4 kHz)
X
or f /2)
X X
= 5.0 MHz
X
After Reset
00H
MCS=0
f (5.0 MHz)
X
f /2 (2.5 MHz)
X
2
f /2 (1.25 MHz)
X
3
f /2 (625 kHz)
X
4
f /2 (313 kHz)
X
5
f /2 (156 kHz)
X
6
f /2 (78.1 kHz)
X
7
f /2 (39.1 kHz)
X
8
f /2 (19.5 kHz)
X
9
f /2 (9.8 kHz)
X
10
f /2 (4.9 kHz)
X
12
f /2 (1.2 kHz)
X