Series Development - NEC PD78081(A) User Manual

1.6 78K/0 Series Development
The following shows the 78K/0 Series products development. Subseries names are shown inside frames.
100-pin
100-pin
100-pin
100-pin
80-pin
80-pin
80-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
64-pin
42/44-pin
64-pin
64-pin
100-pin
78K/0
100-pin
series
80-pin
80-pin
100-pin
100-pin
100-pin
80-pin
64-pin
Note Under planning
CHAPTER 1 OUTLINE
Control
µPD78075B µPD78075BY
µPD78078 µPD78078Y
µPD78070A µPD78070AY
Note
µPD780018 µPD780018Y
µPD780058 µPD780058Y
µPD78058F µPD78058FY
µPD78054 µPD78054Y
µPD780034 µPD780034Y
µPD780024 µPD780024Y
µPD78014H
µPD78018F µPD78018FY
µPD78014 µPD78014Y
µPD780001
µPD78002 µPD78002Y
µPD78083
Inverter control
µPD780964
µPD780924
FIP® driving
µPD780208
µPD780228
µPD78044H
µPD78044F
LCD driving
µPD780308
µPD780308Y
µPD78064B
µPD78064
µPD78064Y
TM
IEBus supported
µPD78098
LV
µPD78P0914
Y Subseries supports the I
Low EMI noise version of the µPD78078
Timer is added to the µPD78054 and its external interface is enhanced.
ROM-less versions of the µPD78078
Note Serial I/O of the µPD78078 is enhanced and only selected functions are provided.
Note Serial I/O-enhanced versions of the µPD78054; Low EMI noise version
Low EMI noise version of the µPD78054
UART and D/A converter are added to the µPD78014 and I/O is enhanced.
A/D-enhanced version of the µPD780024
Serial I/O-enhanced versions of the µPD78018F; Low EMI noise version
Low EMI noise version of the µPD78018F
Low-voltage (1.8 V) operation versions of the µPD78014 with several ROM and RAM capacities available.
A/D converter and 16-bit timer are added to the µPD78002.
A/D converter is added to the µPD78002.
Basic subseries for control applications
On-chip UART, and operable at low voltage (1.8 V).
A/D-enhanced version of the µPD780924
On-chip inverter control circuit and UART incorporated; Low EMI noise version
I/O and FIP C/D of the µPD78044F are enhanced. Total display outputs : 53 pins
I/O and FIP C/D of the µPD78044H are enhanced. Total display outputs : 48 pins
N-ch open-drain I/O is added to the µPD78044F. Total display outputs : 34 pins
Basic subseries for FIP driving. Total display outputs: 34 pins
SIO of the µPD78064 is enhanced, and ROM and RAM are expanded.
Low EMI noise version of the µPD78064
Basic subseries for driving LCDs and with on-chip UART.
IEBus controller is added to the µPD78054.
PWM output, LV digital code decoder and Hsync counter are incorporated.
Mass-produced products
Products under development
2
C bus specifications.
9