Oscillation Mode Selection Register Format - NEC PD78081(A) User Manual

(2) Oscillation mode selection register (OSMS)
This register specifies whether the clock output from the main system clock oscillator without passing through
the scaler is used as the main system clock, or the clock output via the scaler is used as the main system
clock.
OSMS is set with 8-bit memory manipulation instruction.
RESET input sets OSMS to 00H.
Symbol 7 6
OSMS 0 0 0
Cautions 1. Writing to OSMS should be performed only immediately after reset signal release and before
peripheral hardware operation starts. As shown in Figure 5-4 below, writing data (including
same data as previous) to OSMS cause delay of main system clock cycle up to 2/f
the write operation. Therefore, if this register is written during the operation, in peripheral
hardware which operates with the main system clock, a temporary error occurs in the count
clock cycle of timer, etc. In addition, because the oscillation mode is changed by this register,
the clocks for peripheral hardware as well as that for the CPU are switched.
Figure 5-4. Main System Clock Waveform due to Writing to OSMS
f
XX
Operating at f
2. When writing "1" to MCS, V
Remarks f : Main system clock frequency (fx or fx/2)
xx
f : Main system clock oscillation frequency
x
72
CHAPTER 5 CLOCK GENERATOR
Figure 5-3. Oscillation Mode Selection Register Format
5 4 3 2 1
0 0 0 0
Write to OSMS
(MCS 0)
= f /2 (MCS = 0)
XX X
must be 2.7 V or higher before the write execution.
DD
After
0 Reset
Address
MCS FFF2H 00H
Main System Clock Scaler Control
MCS
0 Scaler used
1 Scaler not used
Max. 2/f
X
Operating at f
R/W
W
during
x
= f /2 (MCS = 0)
XX X