General Registers; General Register Configuration - NEC PD78081(A) User Manual

3.2.2 General registers

A general register is mapped at particular addresses (FEE0H to FEFFH) of the data memory. It consists of 4 banks,
each bank consisting of eight 8-bit registers (X, A, C, B, E, D, L and H).
Each register can also be used as an 8-bit register. Two 8-bit registers can be used in pairs as a 16-bit register
(AX, BC, DE and HL).
They can be described in terms of function names (X, A, C, B, E, D, L, H, AX, BC, DE and HL) and absolute names
(R0 to R7 and RP0 to RP3).
Register banks to be used for instruction execution are set with the CPU control instruction (SEL RBn). Because
of the 4-register bank configuration, an efficient program can be created by switching between a register for normal
processing and a register for interruption request for each bank.
FEFFH
BANK0
FEF8H
BANK1
FEF0H
BANK2
FEE8H
BANK3
FEE0H
FEFFH
BANK0
FEF8H
BANK1
FEF0H
BANK2
FEE8H
BANK3
FEE0H
36
CHAPTER 3 CPU ARCHITECTURE
Figure 3-12. General Register Configuration
(a) Absolute Name
16-Bit Processing
15
(b) Function Name
16-Bit Processing
15
RP3
RP2
RP1
RP0
0
HL
DE
BC
AX
0
8-Bit Processing
R7
R6
R5
R4
R3
R2
R1
R0
7 0
8-Bit Processing
H
L
D
E
B
C
A
X
7 0