Interrupt Request Flag Register Format - NEC PD78081(A) User Manual

(1) Interrupt request flag registers (IF0L, IF0H, IF1L)
The interrupt request flag is set to 1 when the corresponding interrupt request is generated or an instruction
is executed. It is cleared to 0 when an instruction is executed upon acknowledgment of an interrupt request
or upon application of RESET input.
IF0L, IF0H, and IF1L are set with a 1-bit or 8-bit memory manipulation instruction. If IF0L and IF0H are used
as a 16-bit register IF0 use a 16-bit memory manipulation instruction for the setting.
RESET input sets these registers to 00H.
Symbol 7 6
IF0L 0 0
7 6
IF0H 0 0
7 6
IF1L 0 0
Cautions 1. TMIF4 flag is R/W enabled only when a watchdog timer is used as an interval timer. If
a watchdog timer is used in watchdog timer mode 1, set TMIF4 flag to 0.
2. Set 0 to the bits 1, 5 to 7 of IF0L and bits 0, 1, 5 to 7 of IF0H and IF1L.
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CHAPTER 12 INTERRUPT FUNCTION
Figure 12-2. Interrupt Request Flag Register Format
5 4 3 2
0 PIF3 PIF2 PIF1
5 4 3 2
0 STIF SRIF SERIF
5 4 3 2
0 TMIF6 TMIF5 ADIF
Address
1 0
FFE0H
0 TMIF4
1 0
FFE1H
0 0
1 0
0 0
FFE2H
IF
0 No interrupt request signal
1 Interrupt request signal is generated;
Interrupt request state
After
R/W
Reset
00H R/W
00H R/W
00H R/W
Interrupt Request Flag