8-Bit Timer/Event Counters 5 And 6 Configurations; 8-Bit Timer/Event Counters 5 And 6 Block Diagram - NEC PD78081(A) User Manual

6.2 8-Bit Timer/Event Counters 5 and 6 Configurations

The 8-bit timer/event counters 5 and 6 consist of the following hardware.
Timer register
Register
Timer output
Control register
Figure 6-1. 8-Bit Timer/Event Counters 5 and 6 Block Diagram
2f -f /2
xx xx
f /2
xx
TI5/P100/TO5,
TI6/P101/TO6
TCL
Timer Clock
Select Register n
Note Refer to Figures 6-2 for details of configurations of 8-bit timer/event counters 5 and 6 output control circuits.
Remark n = 5, 6
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CHAPTER 6 8-BIT TIMER/EVENT COUNTERS 5 AND 6
Table 6-4. 8-Bit Timer/Event Counters 5 and 6 Configurations
Item
8 bits
Compare register: 8 bits
2 (TO5, TO6)
Timer clock select register 5 and 6 (TCL5, TCL6)
8-bit timer mode control register 5 and 6 (TMC5, TMC6)
Port mode register 10 (PM10)
8-Bit Compare Register
9
8-Bit Timer Register n
11
4
TCL TCL TCL
n3 n2 n1 n0
Configuration
2 (TM5, TM6)
2 (CR50, CR60)
Internal Bus
(CRn0)
Match
OVF
(TMn)
Clear
Selector
2
TCEn
8-Bit Timer Mode
Control Register n
Internal Bus
Output Control
Note
Circuit
6
TMC TMC
LVSn LVRn TOEn
n6 n1
INTTMn
TO5/P100/TI5,
TO6/P101/TI6