Interrupt Request Enabled For Multiple Interrupt During Interrupt Servicing - NEC PD78081(A) User Manual

8-bit single-chip microcontroller
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Table 12-4. Interrupt Request Enabled for Multiple Interrupt during Interrupt Servicing
Interrupt
during processing
Non-maskable interrupt
Maskable interrupt
Software interrupt
Remarks 1.
188
CHAPTER 12 INTERRUPT FUNCTION
Multiple Interrupt
Non-maskable
Request
Interrupt
Request
ISP=0
ISP=1
E
: Multiple interrupt enable
2.
D : Multiple interrupt disable
3.
ISP and IE are the flags contained in PSW
ISP=0 : An interrupt with higher priority is being serviced
ISP=1 : An interrupt request is not accepted or an interrupt with lower priority is being
serviced
IE=0
: Interrupt request acknowledge is disabled
IE=1
: Interrupt request acknowledge is enabled
4.
PR is a flag contained in PR0L, PR0H, and PR1L
PR=0
: Higher priority level
PR=1
: Lower priority level
Maskable Interrupt Request
PR=0
IE=1
IE=0
D
D
D
E
E
D
E
E
D
E
E
D
PR=1
IE=1
IE=0
D
D
D
D
E
D
E
D

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