NEC PD78081(A) User Manual page 248

Instruction
Mnemonic
Group
saddr.bit, $addr16
sfr.bit, $addr16
BT A.bit, $addr16
PSW.bit, $addr16
[HL].bit, $addr16
saddr.bit, $addr16
sfr.bit, $addr16
BF A.bit, $addr16
PSW.bit, $addr16
[HL].bit, $addr16
Condi-
saddr.bit, $addr16
tional
branch
sfr.bit, $addr16
BTCLR
A.bit, $addr16
PSW.bit, $addr16
[HL].bit, $addr16
B, $addr16
DBNZ C, $addr16
saddr. $addr16
SEL RBn
NOP
EI
CPU
control
DI
HALT
STOP
Notes 1. When the internal high-speed RAM area is accessed or instruction with no data access
2. When an area except the internal high-speed RAM area is accessed
Remark One instruction clock cycle is one cycle of the CPU clock (f
CHAPTER 16 INSTRUCTION SET
Operands Byte
Note 1
3 8
4 –
3 8
3 –
3 10
4 10
4 –
3 8
4 –
3 10
4 10
4 –
3 8
4 –
3 10
2 6
2 6
3 8
2 4
1 2
2 –
2 –
2 6
2 6
Clock
Note 2
9 PC PC + 3 + jdisp8 if(saddr.bit) = 1
11 PC PC + 4 + jdisp8 if sfr.bit = 1
– PC PC + 3 + jdisp8 if A.bit = 1
9 PC PC + 3 + jdisp8 if PSW.bit = 1
11 PC PC + 3 + jdisp8 if (HL).bit = 1
11 PC PC + 4 + jdisp8 if(saddr.bit) = 0
11 PC PC + 4 + jdisp8 if sfr.bit = 0
– PC PC + 3 + jdisp8 if A.bit = 0
11 PC PC + 4 + jdisp8 if PSW. bit = 0
11 PC PC + 3 + jdisp8 if (HL).bit = 0
PC PC + 4 + jdisp8
12 if(saddr.bit) = 1
then reset(saddr.bit)
PC PC + 4 + jdisp8 if sfr.bit = 1
12
then reset sfr.bit
PC PC + 3 + jdisp8 if A.bit = 1
–
then reset A.bit
PC PC + 4 + jdisp8 if PSW.bit = 1
12
then reset PSW.bit
PC PC + 3 + jdisp8 if (HL).bit = 1
12
then reset (HL).bit
B B – 1, then
–
PC PC + 2 + jdisp8 if B
C C –1, then
–
PC PC + 2 + jdisp8 if C
(saddr) (saddr) – 1, then
10
PC PC + 3 + jdisp8 if(saddr)
– RBS1, 0 n
– No Operation
6 IE 1(Enable Interrupt)
6 IE 0(Disable Interrupt)
– Set HALT Mode
– Set STOP Mode
) selected by the PCC register.
CPU
Operation
0
0
0
Flag
Z AC CY
225