Operation After Halt Mode Release; Halt Mode Release By Reset Input - NEC PD78081(A) User Manual

(c) Clear upon RESET input
As is the case with normal reset operation, a program is executed after branch to the reset vector address.
Figure 13-3. HALT Mode Release by RESET Input
HALT
Instruction
RESET
Signal
Operating
Mode
Clock
Remarks 1. f : main system clock oscillation frequency
X
2. Values in parentheses when operated at f
Release Source
Maskable interrupt
request
Non-maskable interrupt
request
RESET input
Remark : Don't care
CHAPTER 13 STANDBY FUNCTION
Reset
HALT Mode Period
Oscillation
Oscillation stop
Table 13-2. Operation after HALT Mode Release
MK PR
0 0
0 0
0 1
0 1
0 1
1
– –
– –
Wait
17
(2 /f : 26.2 ms)
x
Oscillation
Stabilization
Wait Status
Oscillation
= 5.0 MHz
x
IE ISP Operation
0 Next address instruction execution
1 Interrupt service execution
0 1 Next address instruction execution
0
1 1 Interrupt service execution
HALT mode hold
Interrupt service execution
Reset processing
Operating
Mode
197