Timer Clock Select Register 5 Format - NEC PD78081(A) User Manual

Symbol 7 6 5
TCL5 0 0 0
TCL53 TCL52 TCL51 TCL50
0 0 0
0 0 0
0 1 0
0 1 0
0 1 1
0 1 1
1 0 0
1 0 0
1 0 1
1 0 1
1 1 0
1 1 0
1 1 1
1 1 1
Other than above
Note The timer output (PWM output) cannot be used in cases where the clock is being input from an external
source.
Caution When rewriting TCL5 to other data, stop the timer operation beforehand.
Remarks 1. f
XX
2. f
X
3. TI5
4. MCS : Oscillation mode selection register (OSMS) bit 0
5. Values in parentheses when operated at f
CHAPTER 6 8-BIT TIMER/EVENT COUNTERS 5 AND 6
Figure 6-3. Timer Clock Select Register 5 Format
4 3 2 1
0 TCL53 TCL52 TCL51 TCL50
8-Bit Timer Register 5 Count Clock Selection
MCS=1
0 TI5 falling edge
Note
1 TI5 rising edge Note
0
2f Setting prohibited
XX
1
f f
XX
0
f /2 f
XX
2
1
f /2 f
XX
3
0
f /2 f
XX
4
1
f /2 f
XX
5
0
f /2 f
XX
6
1 f /2 f
XX
7
f /2 f
0
XX
8
f /2 f
1
XX
9
f /2 f
0
XX
11
f /2 f
1
XX
Setting prohibited
: Main system clock frequency (f
: Main system clock oscillation frequency
: 8-bit timer register 5 input pin
Address
0
FF52H
(5.0 MHz)
X
/2 (2.5 MHz)
X
2
/2 (1.25 MHz)
X
3
/2 (625 kHz)
X
4
/2 (313 kHz)
X
5
/2 (156 kHz)
X
6
/2 (78.1 kHz)
X
7
/2 (39.1 kHz)
X
8
/2 (19.5 kHz)
X
9
/2 (9.8 kHz)
X
11
/2 (2.4 kHz)
X
or f /2)
X X
= 5.0 MHz
X
After Reset R/W
00H R/W
MCS=0
f (5.0 MHz)
X
f /2 (2.5 MHz)
X
2
f /2 (1.25 MHz)
X
3
f /2 (625 kHz)
X
4
f /2 (313 kHz)
X
5
f /2 (156 kHz)
X
6
f /2 (78.1 kHz)
X
7
f /2 (39.1 kHz)
X
8
f /2 (19.5 kHz)
X
9
f /2 (9.8 kHz)
X
10
f /2 (4.9 kHz)
X
12
f /2 (1.2 kHz)
X
85