Omron CP1E CPU UNIT SOFTWARE User Manual page 153

Flow of Operation
1
2
Create
ladder
program
High-speed Counter Interrupts Settings
Setting in PLC Setup
on Built-in Input Tab Page
High-speed counter 0
High-speed counter 1
High-speed counter 2
High-speed counter 3
High-speed counter 4
High-speed counter 5
* High-speed counter 5 is not supported by E10 CPU Units.
Precautions for Correct Use Precautions for Correct Use
A built-in input cannot be used as a normal input, interrupt input, or quick-response input if it is
being used as a high-speed counter input. Refer to 8-3-3 Allocating Built-in Input Terminals for
details.
CP1E CPU Unit Software User's Manual(W480)
PLC Setup
Interrupt task
Execution of CTBL and
INI instructions in a
cyclic task
Instruction
Select Use Check CTBL
Box.
*
11 High-speed Counters
• Enable the required high-speed counters.
• Select the Use high speed counter Check Box for
high-speed counters 0 to 5. Set the input setting,
counting mode and reset method on the Built-in
Tab Page of the PLC Setup using the CX-Pro-
grammer.
• Terminals 00 to 06 on the 0CH terminal block can
be used for high-speed counters. High-speed
counters 0 to 5 correspond to terminals 00 to 05.
Write a program for interrupt tasks 0 to 15.
• Set the comparison values for the high-speed
counter and the interrupt tasks (0 to 15) to be
started using the CTBL instruction.
• Start the comparison using the INI instruction.
The comparison can be started simultaneously
when registering the comparison values using
the CTBL instruction.
CTBL port specifier (C1)
#0000
#0001
#0002
#0003
#0004
#0005
11
Interrupt task
number
0 to 15 (Specified by
user.)
11-15