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WSIZE
5
Set the same size as the output data size of the EtherCAT master device in word units. The setting range is 0 to
199*.
SCAN
6
Set the timing in which the controller CPU exchanges cyclic data with EtherCAT.
The data exchange cycle of the controller CPU is asynchronous with cyclic communication. When HIGH is set,
the controller CPU inputs cyclic data in the timing of the high-speed scan time of the CPU. When LOW is set,
the controller CPU inputs cyclic data in the timing of the low-speed scan time of the CPU.
Output Register Setting
D
7
Set whether or not the controller CPU exchanges output data with EtherCAT. When the checkbox is checked,
there is no exchange of data.
ADDRESS
8
Set, as a hexadecimal word, the initial address of the output area of the controller CPU for the input data of the
EtherCAT master device. The setting range is 0 to 7FFF.
WSIZE
9
Set the same size as the input data size of the EtherCAT master device in word units. The setting range is 0 to
199*.
SCAN
10
Set the timing in which the controller CPU exchanges cyclic data with EtherCAT.
The data exchange cycle of the controller CPU is asynchronous with cyclic communication. When HIGH is set,
the controller CPU outputs cyclic data in the timing of the high-speed scan time of the CPU. When LOW is set,
the controller CPU outputs cyclic data in the timing of the low-speed scan time of the CPU.
Others
Comment
11
Set any name of your choice up to 32 single byte characters for the local station.
∗ Set WSIZE in the input register settings and output register settings so that it satisfies the following conditions.
Condition
1. When 0 is included in either setting
2. When either setting is an odd-number size
Other than condition 1 or condition 2
4.2.1 Transmission Parameters Tab Page
WSIZE Setting
Input WSIZE + output WSIZE ≤ 198 words
Input WSIZE + output WSIZE ≤ 199 words
Input WSIZE + output WSIZE ≤ 200 words
4.2 EtherCAT Detail Definition
4
4-5
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