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CAUTION
Turning decimation ON when sigBw=0 results in aliasing (garbage data) due to
upper limit of the sampling frequency.
Comments
To ensure full alias-free operation the analog anti-alias filter (set by the
hpe1437_input_alias_filter function) should be ON unless the application inherently
bandlimits the input signal to less than fs/2. The analog anti-alias filter has a fixed
bandwidth and thus is fully effective only when fs≥20 MHz. If a slower external ADC
clock is used, an additional analog filter of the appropriate bandwidth may be required
for full alias protection.
The decimation process used to reduce the output sample rate is driven from a
"decimation counter" which keeps track of which samples to save and which ones to
discard for each of the octave bandwidth reduction filter stages. In multi-module
systems where synchronous sampling is required, the decimation counters in all the
modules must be synchronous with each other. This condition can be forced by using
the hpe1437_filter_sync function.
The following table summarizes the relationship between data parameter combinations,
decimation, filter bandwidth, and whether the particular combination permits block
and/or continuous measurements:
=====================================================================
Resolution
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Type
Decimation
16
Complex
False
32
Real
False
32
Complex
False
32
Complex
True
32
Complex
False
All other combinations
VXI plug&play Programming Reference
Filter BW
Block
Continuous
0 or 1
Yes
0 or 1
Yes
0 or 1
No
0 or 1
Yes
2
Yes
Yes
Yes
E1437A User's Guide
Sample
rate
(MBytes)
No
40
No
80
No
40
No
40
No
40
<40
4-29
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