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The Measurement loop
The measurement loop progresses through four states. The transition from one state
to the next is tied to the transition of the SYNC signal. The effect of the SYNC signal
is summarized in the following diagram representing the four possible states of an
E1437 module.
Data collected and output
In the Idle state the E1437 places no new data into the FIFO output buffer memory
although previously measured data is retained in the buffer memory and is available
for output via the VME or local bus I/O ports. The module stays in the Idle state until
the SYNC line is asserted.
Upon entering the Arm state the E1437 clears old data and starts saving new data
into its FIFO. It remains in the Arm state until the SYNC signal is released. If an
E1437 is programmed with a pre-trigger delay, it collects enough data samples to
satisfy this pre-trigger delay, and then releases the SYNC line. If no pre-trigger delay
has been programmed, the module releases the SYNC line immediately. When all
E1437s in a system have released the SYNC line the module moves to the Trigger
state.
Upon entering the Trigger state an E1437 continues collecting data into the FIFO,
discarding any data prior to the pre-trigger delay. An E1437 remains in the Trigger
state until the SYNC line is asserted. The SYNC line may be asserted by a direct
command or by any E1437 which encounters a trigger condition and is programmed
to assert the SYNC line. When the SYNC signal is asserted, all modules
synchronously move to the Measure state.
In the Measure state the E1437 continues collecting data and sends the data saved
in the FIFO memory to the selected I/O port, starting with the sample indicated by
the trigger arrival, offset by the trigger delay. This data transfer continues until all
data has been transferred or until the module meets the criteria for returning to the
Idle state imposed by block mode or continuous mode operation constraints.
Modules programmed for block mode operation will assert the SYNC line until a
complete block of data, including any pre-programmed pre- or post-trigger delay,
has been collected and is available to the I/O port. The module then releases the
SYNC line and returns to the Idle state.
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No data collected
Assert
Old data available
IDLE
Release
(Block Mode)
Measure
Assert
E1437A User's Guide
New data collected
Old data cleared
ARM
Release
Data collected
Trigger
Pre-trigger data cleared
Using the E1437A
3-5
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