Agilent Technologies E1437A User Manual page 63

E1437A User's Guide
VXI plug&play Programming Reference
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MASTER
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N/A
N/A
N/A
N/A
OFF|BUFFER
OFF|BUFFER
OFF
OFF
ON
ON
ON
ON
ON
ON
ON
ON
BUFFER
BUFFER
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The maximum rate at which data may be transferred to memory is determined by
the DSP clock rate: Max bytes/s = 4 × DSP clock rate. In continuous mode the
maximum rate is limited to (4 × DSP clock rate) ÷ 2. However, you may successfully
perform this type of measurement by adding a level of decimation to reduce the
sample rate.
If fs>20480000 then dsp must=ADC.
Example
The program multichan.exe described in Example Programs provides an example of
how to correctly set up a multi-module system with synchronous clocks.
Reset Values
sync
source
dsp
master
fs
Effect on Active
Commands in this group, other than those ending in _get and HPE1437_clock_fs, abort
Measurement any measurement in progress.
See Also
hpe1437_init, hpe1437_filter_setup, hpe1437_data_
4-16
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SYNC SOURCE
OFF 20.x
OFF EXT
OFF EXT
OFF EXT_PLL
FRONT N/A
FRONT N/A
REAR N/A
REAR N/A
FRONT 20.x
FRONT EXT
FRONT EXT
FRONT EXT_PLL
REAR 20.x
REAR EXT
REAR EXT
REAR EXT_PLL
REAR N/A
REAR N/A
OFF
20480KHZ
ADC
OFF
20.48 e6
DSP DSP CLOCK RATE
N/A Internal Source
ADC External Source
OSC 20.48
N/A 20
ADC Master ADC
OSC 20.48
ADC Master ADC
OSC 20.48
N/A Internal Source
ADC External Source
OSC 20.48
N/A 20
N/A Internal Source
ADC External Source
OSC 20.48
N/A 20
ADC Master ADC
OSC 20.48