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E1437A User's Guide
Module Description
Trigger Lines
The VXI specification provides 8 TTL and 2 ECL trigger lines which can be used for
module-specific signaling. When programmed in a multi-input configuration, the
E1437A uses the ECL trigger lines, designating ECLTRG0 as the SYNC line and
ECLTRG1 as the ADC sample clock (CLOCK). These lines can be extended to other
mainframes using the SMB connectors on the front panel. The SMB connectors can
also be used for intermodule synchonization within a mainframe, leaving the ECL
trigger lines free for other purposes.
The CLOCK line is the master ADC clock for a synchronous system of multiple
E1437A modules. Only one E1437A module in each mainframe is allowed to drive
this line.
The SYNC line is used to send timing signals among E1437A modules in a
multi-input system. Any module which drives this line must do so synchronously
with CLOCK so that transitions on SYNC do not occur near the rising edge of
CLOCK. This ensures that all modules with a synchronous state machine clocked on
CLOCK will interpret SYNC in a consistent manner for each cycle of the state
machine. SYNC is used for synchronizing, arming, and triggering signals between
E1437A modules. The interpretation of the SYNC line is dependent on the states of
the module described in the Measurement Loop section. The E1437A module is also
capable of controlling the SYNC line synchronously via the control register.
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