Agilent Technologies E1437A User Manual page 103

E1437A User's Guide
VXI plug&play Programming Reference
hpe1437_status_get
Reads Status Register information for the module.
VXIplug&play Syntax
#include "hpe1437.h"
ViStatus hpe1437_status_get(ViSession id, ViPInt16 statusPtr);
Parameters
id is the VXI instrument session pointer returned by the hpe1437_init function.
statusPtr contains the status word. The bits are defined below:
1-0 State: These two bits indicate the current state of the measurement loop as shown
in the table below. See the Measurement Loop section for more information about the
states.
2
3
and is set for Normal operation. See the VXIbus Specifications for more information on
the Normal configuration sub-state.
4
is cleared when the Status register is read.
5
external clock is too fast (over 20.48 MHz) with respect to the DSP clock. This situation
only occurs when a fast external ADC clock is used with an internal oscillator DSP clock.
This bit is cleared with the first subsequent read.
6
requested, the closest valid block size is used until a change to an interrelated parameter
makes the requested block size valid. If a data resolution, data type, filter bandwidth, or
filter decimation parameter was requested which would result in an inability to make a
measurement, the previous valid parameter is used until a change to an interrelated
parameter makes the requested parameter valid.
7
IDLE change has propagated through to all modules in a system. The change is a result
of asserting SYNC or forcing IDLE via the Control Register or issuing a meas_control
command or function.
8
available to be read via the Data register.
4-56
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Bits State
==============
11 Trigger
10 Measure
01 Arm
00 Idle
Passed: This bit is always set to 1.
Ready: This bit is set whenever the module is operating as a message-based device
ADC Error: This bit is set whenever a hardware error is detected in the ADC. The bit
Ext Clk Speed: This bit is set when a measurement has been aborted because the
Setup error: An invalid parameter value was requested. If an invalid block size was
Sync/Idle Complete: This bit is set when the most recent user-initiated SYNC or
Read Valid: This flag is set whenever there is at least one valid 16-bit data word