HP 1660CS-Series User Manual page 280

The Analyzer Hardware
Oscilloscope board theory
Attenuator/Preamp theory of operation
The channel signals are conditioned by the attenuator/preamps, thick film
hybrids containing passive attenuators, impedance converters, and a
programmable amplifier. The channel sensitivity defaults to the standard
1-2-4 sequence (other sensitivities can be set also). However, the firmware
uses passive attenuation of 1, 5, 25, and 125, with the programmable preamp,
to cover the entire sensitivity range.
The input has a selectable 1 MΩ input impedance with ac or dc coupling or a
50Ω input impedance with dc coupling. Compensation for the passive
attenuators is laser-trimmed and is not adjustable. After the passive
attenuators, the signal is split into high-frequency and low-frequency
components. Low frequency components are amplified on the main
assembly, where they are combined with the offset voltage. The ac coupling
is implemented in the low frequency amplifier.
The high- and low-frequency components of the signal are recombined and
applied to the input FET of the preamp. The FET provides a high input
impedance for the preamp. The programmable preamp adjusts the gain to
suit the required sensitivity and provides the output signal to the main
assembly. The output signal is then sent to both the trigger circuitry and
ADC.
Oscilloscope acquisition
The acquisition circuitry provides the sampling, digitizing, and storing of the
signals from the channel attenuators. The channels are identical. Trigger
signals from each channel and the external triggers synchronize acquisition
through the time base circuitry. A 100 MHz oscillator and a time base
provide system timing and sample clocking. A voltage-controlled oscillator
(VCO), frequency divider, and digital phase detector provide the sample
clock for higher sample rates. After conditioning and sampling, the signals
are digitized, then stored in a hybrid IC containing a FISO (fast in, slow out)
memory.
ADC The eight-bit ADC digitizes the channel signal. Digitization is done
by comparators in a flash converter. The sample clock latches the
digitized value of the input to save it so that it can be sent to memory.
FISO memory 8000 samples of the FISO (fast in, slow out) memory
are used per measurement per channel. Memory positions are not
addressed directly. The configuration is a ring which loops continuously
as it is clocked. Memory position is tracked by counting clocks. The
clocking rate is the same as the ADC, however the clock frequency is half
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