HP 1660CS-Series User Manual page 158

Logic analyzers
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The Analyzer Format Menu
Master and Slave Clock fields (State only)
Setup/Hold field
Setup/Hold, in the Master and Slave clock fields, adjusts the relative position
of the clock edge with respect to the time period that data is valid. When the
Setup/Hold field is selected, a configuration menu appears. Use this
Setup/Hold configuration menu to select each pod in the analyzer and assign
a Setup/Hold selection from the selection list.
With a single clock edge assigned, the choices range from 3.5-ns Setup/0.0-ns
Hold to 0.0-ns Setup/3.5-ns Hold. With both edges of a single clock assigned,
the choices are from 4.0-ns Setup/0.0-ns Hold to 0.0-ns Setup/4.0-ns Hold. If
the analyzer has multiple clock edges assigned, the choices range from 4.5-ns
Setup/0.0-ns Hold to 0.0-ns Setup/4.5-ns Hold.
The relationship of the clock signal and valid data under the default setup
and hold is shown in the upper figure. If the relationship of the clock signal
and valid data is such that the data is valid for 1 ns before the clock occurs
and 3 ns after the clock occurs, you will want to use the 1.0 setup and 2.5
hold setting as shown in the lower figure.
Clock position in valid data
7-39

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