Samsung S5PV210 Hardware Design Manual page 93

S5PV210_HARDWARE DESING GUIDE REV 1.0
Fig
ure 8-1) 1-CE case and 2-CE case connection
Figure 8-2) 4-CE case connection
(1) Nand signal power domain belongs to VDD_M0. Confirm the voltage level of another SRAM interface.
(2) External 4.7K pull-up resistor need to be added to RnB signal.
(3) When NAND is selected for iROM booting storage, Xm0CSn2(NFCSn0),Xm0FRnB0 should be used for NAND
chip select & RnB.
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