Samsung S5PV210 Hardware Design Manual page 66

S5PV210_HARDWARE DESING GUIDE REV 1.0
Table 2.0-3 S5PV210 584 Pin Assignment − Pin Number Order (4/8)
Ball Pin Name
C6 XMMC0DATA_3
C7 XMMC1CDN
C8 XURXD_0
C9 XI2C0SCL
C10 XMMC3DATA_1
C11 XM1DQM_3
C12 XM1DQSN_3
C13 XM1DATA_27
C14 XM1DATA_23
C15 XM1DATA_19
C16 XM1DATA_17
C17 XM1DATA_15
C18 XM1DATA_12
C19 XM1DATA_7
C20 XM1DATA_6
C21 XM1DQM_0
C22 XM1DATA_1
C23 XM2DATA_30
C24 XM2DQS_3
C25 XM2DQSN_3
Ball Pin Name
D21 XM1ADDR_15
D22 XM2DATA_28
D23 XM2DATA_26
D24 XM2DATA_25
D25 XM2DATA_24
E1 XMSMDATA_2
E2 XMSMDATA_1
E3 XMSMDATA_5
E4 XMSMADDR_2
E5 XMSMADDR_12
E6 XMMC0CMD
E7 XMMC1DATA_1
E8 XPWMTOUT_0
E9 XSPICSN_0
E10 XURTSN_1
E11 XMMC3CDN
E12 XM1RASN
E13 XM1DATA_20
E14 XM1DATA_21
E15 XM1ADDR_3
Ball Pin Name
F11 XI2C0SDA
F12 XPWMTOUT_3
F13 XM1DATA_22
F14 XM1ADDR_11
F15 XM1ADDR_5
F16 XM1ADDR_9
F17 XM1CASN
F18 XM1ADDR_13
F19 XM1ADDR_10
F20 XM2ADDR_5
F21 XM2ADDR_4
F22 XM2DATA_27
F23 XM2DATA_20
F24 XM2DQS_2
F25 XM2DQSN_2
G1 XMSMADDR_4
G2 XMSMADDR_9
G3 XMSMADDR_11
G4 XM0ADDR_9
G5 XM0ADDR_13
Ball Pin Name
H1 XMSMADDR_0
H2 XMSMADDR_5
H3 XM0ADDR_15
H4 XM0ADDR_8
H5 XM0ADDR_3
H6 XM0ADDR_12
H7 XMSMADDR_3
H19 XM2ADDR_9
H20 XM2ADDR_13
H21 XM2DQM_2
H22 XM2ADDR_6
H23 XM2ADDR_11
H24 XM2DATA_17
H25 XM2DATA_16
J1 XM0CSN_2
J2 XM0FWEN
J3 XM0ADDR_10
J4 XM0ADDR_2
J5 XM0ADDR_7
J6 XM0ADDR_4