Mipi Dsi & Csi - Samsung S5PV210 Hardware Design Manual

S5PV210_HARDWARE DESING GUIDE REV 1.0
21. MIPI DSI & CSI
21.1.
Signal Description
Ball Name I/O Description
IO Master DATA LANE0 DP for MIPI-DPHY
XMIPIMDP0
IO Master DATA LANE1 DP for MIPI-DPHY
XMIPIMDP1
IO Master DATA LANE2 DP for MIPI-DPHY
XMIPIMDP2
IO Master DATA LANE3 DP for MIPI-DPHY
XMIPIMDP3
IO Master DATA LANE0 DN for MIPI-DPHY
XMIPIMDN0
IO Master DATA LANE1 DN for MIPI-DPHY
XMIPIMDN1
IO Master DATA LANE2 DN for MIPI-DPHY
XMIPIMDN2
IO Master DATA LANE3 DN for MIPI-DPHY
XMIPIMDN3
IO Master CLK Lane DP for MIPI-DPHY
XMIPIMDPCLK
IO Master CLK Lane DN for MIPI-DPHY
XMIPIMDNCLK
IO Slave DATA LANE0 DP for MIPI-DPHY
XMIPISDP0
IO Slave DATA LANE1 DP for MIPI-DPHY
XMIPISDP1
IO Slave DATA LANE2 DP for MIPI-DPHY
XMIPISDP2
IO Slave DATA LANE3 DP for MIPI-DPHY
XMIPISDP3
IO Slave DATA LANE0 DN for MIPI-DPHY
XMIPISDN0
IO Slave DATA LANE1 DN for MIPI-DPHY
XMIPISDN1
IO Slave DATA LANE2 DN for MIPI-DPHY
XMIPISDN2
IO Slave DATA LANE3 DN for MIPI-DPHY
XMIPISDN3
IO Slave CLK Lane DP for MIPI-DPHY
XMIPISDPCLK
IO Slave CLK Lane DN for MIPI-DPHY
XMIPISDNCLK
IO Regulator capacitor for MIPI-DPHY
XMIPIVREG_0P4V
Comment
Connect 2nF Cap. To GND
118