Samsung S5PV210 Hardware Design Manual page 104

Risc microprocessor
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S5PV210_HARDWARE DESING GUIDE REV 1.0
II.
HS clock and HS USB different pairs should be first routed with minimum trace length.
III.
Route high-speed USB signals not using vias and stubs with using two 45 degree turns or an arc instead
of making a single 90 degree trun. This reduces signal reflections and impedance changes that affect
signal quality.
IV.
Do not route usb traces under crystals, oscillators, clock synthesizers, magnetic devices or ICs that use
and/or duplicate clocks.
V.
Route all traces over continuous planes(VCC and GND), with no interruptions. Avoid crossing over anti-
etch if at all possible.
VI.
Ther parallelism between USB differential signals with the trace spacing should be maintained. The
deviation should be minimized.
VII.
The minimized length of high speed clock and periodic signal traces is highly recommended. The
suggested spacing to clock signal is 50mils ( 1mils = 0.0254mm)
VIII.
To prevent crosstalk, you should 20-mil minimum spacing between HS usb signal pairs. For example,
IX. Max trace length mismatch between HS usb signal pairs such as DM and DP should be under 150mils.
X. Poor routing mistake
104

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