Reading The Rs-232 Control Signal Status - Mitsubishi QJ71C24/-R2 User Manual

Melsec system q programmable logic controllers, serial communication modules gx configurator-sc
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10 TROUBLESHOOTING

10.1.3 Reading the RS-232 control signal status

Read command
b15
D0
D1
10 - 9
This section explains how to read the control signal status stored in the buffer memory
during communication using RS-232 interface.
When GX Configurator-SC is used, check the status using the "Transmission control
and others monitor/test" screen (see Section 8.6.3).
When a transmission problem occurs, read operation is executed to check the signal
on/off status of the RS-232 interface.
(1) RS-232 control signal status storage area (address: 254
The status of the RS-232 signals is stored in buffer memory addresses 254
264
as follows:
H
254
Buffer memory address
H
264
H
System area for QJ71C24 (-R2)
REMARK
(1) For more details on signals for RS-232, see Section 3.2.1.
(2) Signals output from the Q series C24 side (RTS and DTR) are controlled by the
operating system (OS) of the Q series C24.
They cannot be directly controlled by the sequence program.
(3) There is a maximum delay of 100 ms in signal status stored in the buffer
memory above.
(2) Example of a program that reads from RS-232 control signal status
storage area
The following shows an example of a program that reads the RS-232 control
signal status.
(input/output signals X/Y00 to X/Y1F of the Q series C24)
Example of FROM instruction
b6
b5
b4 b3 b2 b1 b0
to
0
0
0
0
b15
to
b6
0
0
1 : ON
0 : OFF
0
1
1
1
DTR signal: ON, DSR signal: ON, RTS signal: ON
CD signal: ON, DTR signal: ON, DSR signal: ON
1
1
1
0
b5
b4
b3
b2
b1
b0
1/0
1/0
1/0
1/0
1/0
1/0
(Information on CH1 side)
1/0
1/0
1/0
1/0
1/0
1/0
(Information on CH2 side)
Reads the status of RS-232 control signal on
the CH1 side from address 254
Reads the status of RS-232 control signal on
the CH2 side from address 264
MELSEC-Q
, 264
)
H
H
and
H
RS
DSR
DTR
CD
CS
RI
.
H
.
H
10 - 9

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