Mitsubishi QJ71C24/-R2 User Manual page 162

Melsec system q programmable logic controllers, serial communication modules gx configurator-sc
Hide thumbs Also See for QJ71C24/-R2:
Table of Contents

Advertisement

7 DATA COMMUNICATIONS USING BIDIRECTIONAL PROTOCOL
For normal completion
D 0
Interface number
D 1
Reception result
D 2
Receive data count
D 3
Allowable receive data count
D10
Receive data
to
to
D m
Receive data
7 - 11
(Program example)
When Q series C24 I/O signals are from X/Y00 to X/Y1F:
(1)
(0)
(n)
(10)
When the received data count is larger than the
allowable received data count, only the data up to
the allowable received data count will be stored
and the excess data will be discarded.
Designate the receive channel.
Clear the receive data count storage device
to 0.
Designate the allowable receive data count.
With the normal completion, the receive
data within the allowable receive data count
(user designated) is read from the receive
data storage area in the buffer memory.
After the BIDIN instruction is executed,
the user designated read completion
signal (M0) comes on for 1 scan.
The reading of received data is performed
by the PLC CPU.
Q series C24
Address
Buffer memory
258
Data reception result storage area
H
600
Receive data count storage area
H
601
H
to
Receive data storage area
7FF
H
MELSEC-Q
7 - 11

Hide quick links:

Advertisement

Table of Contents
loading

This manual is also suitable for:

Qj71c24nSh-080007Qj71c24n-r2Qj71c24n-r4Qj71c24Qj71c24-r2 ... Show all

Table of Contents