Program Example - Mitsubishi QJ71C24/-R2 User Manual

Melsec system q programmable logic controllers, serial communication modules gx configurator-sc
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6 DATA COMMUNICATION USING THE NON PROCEDURE PROTOCOL
For normal completion
D 0
Interface number
D 1
Reception result
D 2
Receive data count
D 3
Allowable receive data count
D10
Receive data
to
to
D m
Receive data
For abnormal completion
D 0
Interface number
D 1
Reception result
D 2
Receive data count
D 3
Allowable receive data count
D10
Receive data
to
to
D x
Receive data
6 - 12
4) The device completing the INPUT instruction turns ON when the reading of receive
data is completed.
When the complete device + 1 (abnormal completion signal) turns ON, the error
code is stored in the control data completion status (S1 + 1).

(Program example)

When the Q series C24 I/O signals are from X/Y00 to X/Y1F:
(1)
(0)
(n)
(10)
When the receive data count is larger than the
allowable receive data count, only the data up to
the allowable receive data count will be stored
and the excess data will be discarded.
(1)
(other than 0)
From the buffer memory (address 258
(n)
From the buffer memory (address 600
(10)
Data received prior to an error occurrence will be
stored in the receive data storage device.
Designate the receive channel.
Clear the reception result and receive data count
storage device to 0.
Designate the allowable receive data count.
With normal completion, the receive data within the
allowable receive data count (user designated) is read
from the receive data storage area in the buffer memory.
Once the INPUT instruction is executed, the user
designated read completion signal (M0) turns ON
for 1 scan.
The reading of receive data and switching of the
ON/OFF status are performed by the PLC CPU.
The abnormal completion flag is reset by an external
command.
Q series C24
Address
Buffer memory
258
Data reception result storage area
H
600
Receive data count storage area
H
601
H
to
Receive data storage area
7FF
H
)
H
)
H
MELSEC-Q
6 - 12

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