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uPD72257
NEC uPD72257 Manuals
Manuals and User Guides for NEC uPD72257. We have
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NEC uPD72257 manual available for free PDF download: Preliminary User's Manual
NEC uPD72257 Preliminary User's Manual (343 pages)
Graphics Controllers
Brand:
NEC
| Category:
Video Card
| Size: 2.01 MB
Table of Contents
Table of Contents
7
Chapter 1 Introduction
11
Block Diagrams
12
Chapter 2 Pin Functions
15
Pin Lists
15
Ravin-L Pin List
16
Ravin-M Pin List
21
Pull-Up Resistor Pin Groups
26
Ravin-L Pin Functions
30
Ravin-L Pin to Signals Reference
31
Ravin-M Pin Functions
36
Ravin-M Pin Multiplexing Control
36
Ravin-M Pinout Options
38
Ravin-M Pin to Signals Reference
56
Recommended Connection of Unused Pins
67
Pin States with Respect to Reset
82
Chapter 3 Memory and Register Map
83
Ravin-L Memory and Register Map
83
Ravin-M Memory and Register Map
85
Chapter 4 System Controller
86
Functional Overview
87
Clock Generator
88
PLL Configuration
89
Main System Clock
90
Video Output Clocks
90
Internal RAM Clock (Ravin-L Only)
90
Resets
91
PLL Restart
92
Software and Watchdog Reset
93
Host CPU Synchronization
93
System Watchdog
94
Modules Control Functions
94
Internal RAM Control (Ravin-L Only)
94
SDRAM Control
94
Video Input Control
95
Video Output Control
97
Boot Mode Function
98
System Controller Registers
100
System Controller Registers Overview
100
System Controller Registers Write Protection
100
System Controller Registers Details
101
Chapter 5 Host CPU Interface
119
Functional Overview
122
Lbus Interface
123
Lbus-I/F Signals
123
Lbus-I/F Addressing Modes
124
Lbus-I/F Protocol
125
Mode
126
Lbus-I/F DMA Request
132
Adbus Interface
133
Adbus-I/F Signals
133
Adbus-I/F Address Offset Function
133
Adbus-I/F Data Access
134
Adbus-I/F Principle Timing
136
Address Alignment
139
Interrupt Controller
140
AHB Master Status and Interrupts
142
Host-I/F Registers
143
Host-I/F Registers Overview
143
Host-I/F Registers Details
144
Chapter 6 Video Input (Ravin-M Only)
151
Functional Overview
152
Data Format and Synchronization
154
ITU-R656 Data Input
154
RGB Data Input
155
Synchronization Status Information
156
Video Capturing
156
Video Capturing Modes
156
Start and Stop of Video Capturing
157
Scaling, Cropping and Storing
158
Cropping
159
Scaling
160
Storing
164
Colour Format Conversions
164
RGB(666)/(565) to RGB(888) Conversion
164
YUV(4:2:2) to YUV(4:4:4) Conversion
165
YUV(4:4:4) to RGB(888) Conversion
166
YUV Adjustment
166
Dithering
167
Video Data FIFO and Framebuffer Addressing
167
Framebuffer Addressing
168
Interrupts
169
Interrupt Sources
169
Interrupt Control
170
Video Input Registers
171
Video Input Registers Overview
171
Video Input Registers Details
172
Chapter 7 Video Output
188
Functional Overview
190
Colour Formats
191
CLUT Palette
191
Display Data Output Formats
192
Timing Signals
193
Display Data Clock Signal
193
Synchronization Signals
194
DMA FIFO and Framebuffer Addressing
196
FIFO Watermark
197
Framebuffer Addressing
197
Interrupts
197
Interrupt Sources
198
Interrupt Controller
199
Start and Stop of Video Output
200
Video Output Registers
201
Video Output Registers Overview
201
Video Output Registers Details
202
Chapter 8 Drawing Engine
215
Functional Overview
216
Introduction
217
Drawing Features
219
Drawing Features Summary
219
Vector Drawing
220
Bitblt
221
Bilinear Filtering
222
Input and Output Data Formats
223
Source and Destination Data
223
Texture Colour Formats
223
Framebuffer Colour Formats
223
Rendering Pipeline
225
Coordinate Transformation
225
Rasterization
225
Edge Setup Linear Case
227
Edge Setup Quadratic Case
231
Band Filter
234
Clamping Unit
235
Combiner Unit
236
Rasterization Optimization
237
Colourization
240
Texturing
241
Src_One
245
Src_Onedst_Alpha
245
Src_Alpha
245
Src_One_Minus_Alpha Dst_One
245
Src_One_Minus_Alpha
245
Dst_One_Minus_Alpha
245
Blending
245
Rendering Modes
247
Register Based Mode
247
Display List Based Mode
247
Interrupts
250
Interrupt Sources
250
Interrupt Control
250
Performance Counters
252
Drawing Engine Registers
253
Drawing Engine Registers Overview
253
Control Registers Details
255
Colour Registers Details
265
Limiter Registers Details
268
Texture Registers Details
272
Miscellaneous Registers Details
284
Chapter 9 External Memory Interface Controller
290
Functional Overview
293
SDRAM Interface
294
SDRAM Initialization
295
SDRAM Refresh Control
297
Static Memory Interface
302
Static RAM Timing
302
Address Decoder
307
Chip Select Configuration
307
Address Adjustment
311
Memory Controller Power-Down
312
Memory Controller Registers
314
Memory Controller Registers Overview
314
Memory Controller Registers Details
315
Chapter 10 Register List
332
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