Check the ST1 line in the self-test results to see that all CPU and memory
modules passed self-test. Note that failing processors are disabled and
appear in the ST1 line. If both processors fail, nothing appears on the ST1
line. There is minimal TLSB traffic during these tests.
Check the ST2 line to see that memory and the CPU(s) passed their
interaction tests and check the ST3 line to see that all three types of
modules on the TLSB passed their tests.
Check the C0 through C10 lines to determine which modules on the PCI
I/O subsystem passed self-test. The example shows one PCI connected to
the KFTHA through a hose. (The maximum number of PCI I/O
subsystems is eleven.)
NOTE: If any module is badly broken on any bus, the console may not get a
response or be able to read whether a device passed self-test. Under
such conditions, self-test does not indicate a failure but instead
indicates that the slot is empty.
Diagnostics and Utilities
8-9
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