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2.3.11
Switches
Note: The switches on the daughter card are DIP switches, with one of the positions identified by an ON
label. Switch positions are thus indicated as ON or OFF.
Table 9
describes the functions and settings of the switches on the daughter card. See
the switch locations. Boldface print indicates factory default settings.
Caution: While the power is on, do not change the settings of switches marked
Table 9.
Switches and Settings, Daughter Card
Switch
SW1.1
SW1.2
SW1.3
SW1.4†
SW1.5
SW1.6†
SW1.7
SW1.8†
SW2
2.3.12
LED Indicators
Table 10
Table 10. LED Indicators, Daughter Card
Designator Description
D1
D2-5
42
Function
JTAG Chain Select
ON
= SW2 setting determines the JTAG Chain
configuration.
OFF = JTAG Chain is connected to CPLD1
Reserved
®
Intel
MSL Routing:
®
OFF = Intel
MSL routed to main board Baseband header
Reserved
Always connect to OFF
Reserved
Processor Bus Boot width
ON
= 32-bits
OFF = 16-bits
Reserved
Processor clock selection
ON
= 13-MHz clock supplied by crystal
OFF = Use external clock source from CLK_PIO
ON
= Determines the JTAG Chain Configuration
describes the LED indicators on the daughter card. See
nRESET_OUT
Power Indicator LEDs controlled by PMIC
Figure 6
Color
Red
Green
®
Intel
PXA27x Processor Developer's Kit - User's Guide
Figure 12
for
†
in
Table
9.
for their locations.
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