Platform-Level Registers; Platform-Level Register Summary - Intel PXA27x User Manual

Developer’s kit

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3.2

Platform-Level Registers

The registers listed in

implemented as either:

•

virtual registers with no physical address, or

•

memory-mapped registers in the field-programmable gate array (FPGA) on the main board

(see

Section 2.2.4, "Main Board Registers and Interrupt Controller (FPGA)" on page

Table 14. Platform-Level Register Summary

Section and Register

Section 3.2.1.1 — System Configuration Register (SCR)

Section 3.2.1.2 — System Configuration Register 2 (SCR2)

Section 3.2.2.1 — Hex LED Data Register 1 (LEDDAT1)

Section 3.2.2.2 — Hex LED Data Register 2 (LEDDAT2)

Section 3.2.2.3 — LED Control Register (LEDCTRL)

Section 3.2.2.4 — General-Purpose Switch Register (GPSWR)

Section 3.2.2.5 — Miscellaneous Write Register 1 (MSCWR1)

Section 3.2.2.6 — Miscellaneous Write Register 2 (MSCWR2)

Section 3.2.2.8 — Miscellaneous Read Register 1 (MSCRD1)

Section 3.2.2.9 — Platform Interrupt Mask/Enable Register (INTMSKENA)

Section 3.2.2.10 — Platform Interrupt Set/Clear Register (INTSETCLR)

Section 3.2.2.11 — PCMCIA Socket 0/1 Status/Control Registers (PCMCIAx)

Intel

PXA27x Processor Developer's Kit - User's Guide

Table 14

provide system and peripheral configuration and control. These are

23).

Implementation

Virtual

Memory-mapped

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