Mitsubishi Electric MELSEC Q Series User Manual page 38

Item
Communication using CPU
shared memory by auto
refresh
Communica-
Communication using CPU
tion between
shared memory by programs
CPU mod-
ules
Communication from Basic
model QCPU to Motion CPU
Communication from Basic
model QCPU to PC CPU
module
Factors for increasing scan
Scan time
time
Parameters added for multi-
Parameter
ple CPU system
AnS/A series-compatible
Caution
module
*1: "No. of CPUs" indicates the number of CPU modules set at "No. of PLC" in the Multiple CPU settings screen of PLC parameter.
*2: When the PC CPU module is mounted, the maximum number of mountable I/O modules is the result of "25 - (No. of CPUs + 1)".
*3: For some intelligent function modules, different version may be used.
*4: When the PC CPU module is mounted, the slot to the right of the PC CPU module is 10
Table1.2 Difference from single CPU system (continued)
Single CPU system
Not available
Not available
Not available
Not available
Writing data during RUN or
communication processing
time setting, etc.
Not available
The AnS/A series-compatible modules cannot be used.
Multiple CPU system
Basic model QCPU = 320 points
Motion CPU = 2048 points
C Controller module = 2048 points
PC CPU module = 2048 points
Total points of all CPU modules: 4416
points
With TO, S.TO and/or FROM instruc-
tions and instruction using the multiple
CPU area device (U3En\G ).
Instructions dedicated to the Motion
CPU: 5 types, Instructions dedicated to
the communication between multiple
CPUs: 3 types
Communication dedicated instruction
between multiple CPUs: 1 type
In addition to factors for the single CPU
system, refresh processing for CPU
modules in Multiple CPU system and
waiting time may increase the scan
time.
1)No. of CPU modules (Multiple CPU
setting)
2)Control CPU (detailed I/O assign-
ment setting)
3)Out-of-group I/O setting (Multiple
CPU setting)
4)Operation mode for CPU error stop
(Multiple CPU setting)
5)Communication area setting (refresh
setting) (Multiple CPU setting)
Some parameters must be set to the
same for all CPU modules while others
may be different for each CPU module.
.
H
CHAPTER1 OUTLINE
1
Reference
2
Section 4.1.2
3
4
Section 4.1.4
Section 4.2, 5
Section 4.3.1
6
Section 4.3.2
7
Section 5.2
8
Section 6.1
Section 7.1
1 - 13