Mitsubishi Electric MELSEC Q Series User Manual page 170

Programmable controller multiple cpu system
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(1) Communication using auto refresh
(a) Overview of auto refresh
The auto refresh is a communication method using the auto refresh area of the multiple CPU high speed
transmission area in the CPU shared memory.
The data written to the auto refresh area of the multiple CPU high speed transmission area is sent to that of the
other CPUs in a certain cycle (multiple CPU high speed transmission cycle).
Setting the PLC parameter "Multiple CPU settings" allows to automatically read/ write data among all CPUs in
the Multiple CPU system.
Since device data of other CPUs can be automatically read by the auto refresh function, the host CPU can also
use them as those of host CPU.
Figure 4.24 shows an outline of operations when CPU No.1 performs auto refresh of 32 points for B0 to B1F,
and when CPU No.2 performs auto refresh of 32 points for B20 to B3F.
CPU No.1
CPU shared memory
Multiple CPU high speed transmission
area of CPU No.1
Auto refresh area
Multiple CPU high speed transmission
area of CPU No.2
Auto refresh area
1) Writing by END processing
5) Reading by END processing
Device
B0 to B1F (for CPU No.1)
B20 to B3F (for CPU No.2)
Procedure for the CPU No.2 to read device data of the CPU No.1
1): Transfers data in B0 to B1F to auto refresh area of the host CPU at END processing of a CPU No.1.
2): Sends data in multiple CPU high speed transmission area of CPU No.1 to CPU No.2.
3): Transfers the received data to B0 to B1F at END processing of CPU No.2.
Procedure for the CPU No.1 to read device data of the CPU No.2
4): Transfers data in B20 to B3F to auto refresh area of the host CPU at END processing of CPU No.2.
5): Sends data in multiple CPU high speed transmission area of CPU No.2 to CPU No.1.
6): Transfers the received data to B20 to B3F at END processing of CPU No.1.
(b) Execution of auto refresh
Auto refresh is executed when the CPU module is in RUN, STOP or PAUSE status.
For auto refresh processing at error, refer to Section 4.1.5.
CHAPTER4 COMMUNICATIONS BETWEEN CPU MODULES
2)
Sends to CPU No.2
5) Sends to CPU No.1
Figure 4.24 Outline of auto refresh operation
CPU No.2
CPU shared memory
Multiple CPU high speed transmission
area of CPU No.1
Auto refresh area
Multiple CPU high speed transmission
area of CPU No.2
Auto refresh area
3) Writing by END processing
4) Reading by END processing
Device
B0 to B1F (for CPU No.1)
B20 to B3F (for CPU No.2)
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